Cypress claims industry’s first 65-nm 144-Mbit SRAMs

cypress144mbitsramSan Jose, Calif. — Cypress Semiconductor Corp. has expanded its 65-nm SRAM family with the introduction of the industry’s first monolithic SRAMs at 144-Mbit densities. The 144-Mbit QDRII, QDRII+, DDRII and DDRII+ memories leverage 65-nm process technology developed with foundry partner UMC. These devices feature the market’s fastest available clock speed of 550 MHz and a total data rate of up to 80 Gbits/s, while consuming half the power of 90-nm SRAMs.

The 144-Mbit SRAMs are suitable for networking applications, including Internet core and edge routers, fixed and modular Ethernet switches, 3G base stations and secure routers. They also enhance the performance of medical imaging and military signal processing systems. The devices are pin compatible with 90-nm SRAMs, enabling networking customers to increase performance and double address table or packet buffer size while maintaining the same board layout.

Compared with 90-nm SRAMs, Cypress’s 65-nm QDR and DDR SRAMs offer up to 50 percent lower standby and dynamic current consumption, enabling the new wave of “green” networking infrastructure applications, said Cypress.

The QDRII+ and DDRII+ devices feature on-die termination (ODT), which improves signal integrity, reduces system cost, and saves board space by eliminating external termination resistors. The 65-nm devices use a phase locked loop (PLL) instead of a delay locked loop (DLL), which enables a 35 percent wider data valid window to simplify board-level timing closure and enhance compatibility with third-party processors.

Availability: Available in 165 FBGA packages, the CY7C16xxKV18 65-nm QDRII, QDRII+, DDRII and DDRII+ SRAMs are all currently sampling, with production expected in the first quarter of 2010. Each device is available in multiple configurations based on I/O width (x18 or x36), burst length (B4 or B2) and latency (1.5, 2.0 or 2.5).