Alchimer: 20:1 through-silicon vias save chip makers $700 per 300-mm wafers

Massy, France — Alchimer S.A., a provider of technology for the deposition of nanometric films used in both semiconductor interconnects and 3D through-silicon vias (TSV), has demonstrated that TSVs with aspect ratios of 20:1 can save chip makers more than $700 per 300-mm wafer compared to TSVs with ratios of 5:1, by reducing the die area needed for interconnection.

Alchimer said it modeled TSV costs and space consumption using an existing 3D processor stack for mobile applications that includes a low-power microprocessor, NAND memory chip and a DRAM chip using 65-nm process technology. The chips are connected by about 1,000 TSVs, and the microprocessor die area required for the TSVs was calculated for aspect ratios of 5:1, 10:1 and 20:1.

The comparison included the same via depth in all cases. Decreasing the TSV diameter increased the aspect ratio. The 5:1 scenario consumed 12.3 percent of die area, while a 20:1 approach consumed just 0.8 percent (see Table 1). Applying standard cost modeling, Alchimer found a $731 per wafer cost differential between the two.


Alchimer said the new study provides evidence of the ongoing economic benefits to be gained from the more-advanced via structures, despite some in the microelectronics industry that have suggested staying with low aspect ratio designs that are more compatible with traditional dry-processing approaches.

The more efficient use of wafer space represents a new level of cost savings for Alchimer’s AquiVia, a wet deposition process that can easily deposit top-quality films in vias with aspect ratios of 20:1 or higher, while also reducing overall cost of ownership for TSV metallization by up to 65 percent compared to conventional dry processes.

AquiVia already enables customers to use existing plating equipment for the deposition of isolation, barrier and seed layers, eliminating all dry processing techniques from TSV metallization, and requiring minimal investment in new equipment, according to the company.

“This new data clearly quantifies the benefits of high aspect ratio vias and their reduced need for valuable silicon real estate. Use of these structures allows designers to put more value-added circuitry on their dies, or use smaller dies,” said Steve Lerner, CEO of Alchimer, in a statement.

Alchimer’s study found that a 3X improvement in aspect ratio allows an 8X increase in the number of TSVs in a given area.