Santa Clara, Calif. — National Semiconductor Corp. has claimed the industry’s fastest 12-bit analog-to-digital converter (ADC) at 3.6 Giga-samples per second (GSPS). The ADC12D1800 is 3.6 times faster than any other available 12-bit device, according to National Semiconductor.
In addition, the ADC’s dynamic performance of -147 dBm/Hz noise floor, 52 dB noise power ratio (NPR) and -61 dBFS intermodulation distortion (IMD) enables a new generation of software-defined radio (SDR) architectures and applications, said the semiconductor maker.
National also introduced two other members of its ultra-high-speed ADC family: the ADC12D1600 with sampling speed up to 3.2 GSPS and the ADC12D1000 with performance up to 2.0 GSPS. All three PowerWise ADCs target wideband SDRs including radar, communications, multi-channel set-top box (STB), signal intelligence, and light detecting and ranging (LIDAR) applications.
As an example, in military radar systems, a single ADC12D1X00 combined with a digital down-converter can replace multiple mixers, filters, amplifiers and local oscillator stages used in traditional heterodyne double- or triple-conversion radio implementations.
In next-generation multi-channel STB applications, one ADC12D1X00 can replace all of the STB’s tuners. Shifting such architectures to an SDR implementation dramatically reduces board area, power consumption, and cost, while significantly improving system flexibility, said National.
Since this new class of SDRs requires the ADC to sample wide-bandwidth signals, a new set of metrics such as noise-floor, NPR and IMD provide the best measure of a system’s capability to extract narrowband information from a wideband spectrum, said National.
This is in contrast to traditional ADC specifications — signal-to-noise ratio (SNR), spurious-free dynamic range (SFDR), and effective number of bits (ENOB) — which focus on single-tone performance in the Nyquist bandwidth and do not provide the best gauge of a system’s overall capability, said the company.
National’s 12-bit ADCs are supplied in a leaded or lead-free, 292-ball, thermally enhanced BGA package, and are pin-compatible with the ADC10D1000 and ADC10D1500 ADCs. The 12-bit ADCs run off a 1.9-V single supply and consist of two channels that can operate interleaved or as independent channels. They include circuitry for multi-chip synchronization, programmable gain and offset adjustment per channel.
The internal track-and-hold amplifier and extended self-calibration scheme enable a very flat response of all dynamic parameters for input frequencies exceeding 2 GHz, while providing an exceptionally low 10(-18) code error rate.
Here are key specs for each device:
The ADC12D1800 provides sampling rates up to 3.6 GSPS, or dual-channel rates up to 1.8 GSPS. In addition to excellent noise floor, NPR and IMD performance, the ADC12D1800 offers 57.8 dB SNR, 67 dBc SFDR and 9.2 ENOB at 125 MHz. The energy-efficient design consumes only 2.05W per channel.
The ADC12D1600 delivers single-channel sampling rates up to 3.2 GSPS, or dual-channel rates up to 1.6 GSPS. It features a -147.5 dBm per Hz noise floor, 52 dB NPR and -63 dBFS IMD. The ADC12D1600 consumes 1.9W per channel and offers 58.6 dB SNR, 68 dBc SFDR and 9.3 ENOB at 125 MHz.
The ADC12D1000 provides single-channel sampling rates up to 2.0 GSPS, or dual-channel rates up to 1.0 GSPS. It features a -147.5 dBm per Hz noise floor, 52 dB NPR and -66 dBFS IMD. The ADC12D1000 consumes 1.7W per channel and offers 59.1 dB SNR, 70.5 dBc SFDR and 9.5 ENOB at 125 MHz.
A space-qualified version of the ADC12D1x00 will be supplied in a hermetic 376 column, ceramic column grid array (CCGA) package that meets radiation levels of 120 MeV for single event latch-up and a total ionizing dose of 100 Krads (Si). The device is pin-compatible with the ADC10D1000QML 10-bit ADC.
Availability: All three ADCs are sampling now, with production quantities available in the third quarter of 2010. Non-flight prototyping units and evaluation boards in the CCGA package will be available in the third quarter of 2010.