Chandler, Ariz. — Amkor Technology, Inc. and Texas Instruments Inc. (Dallas, Tex.) have qualified and started production of the industry’s first fine-pitch copper pillar flip-chip packages. The new package shrinks bump pitch up to 300 percent compared to current solder bump flip-chip technology, reducing chip size and cost.
Co-developed to lower packaging costs of IC devices with fine pitch input/output (I/O) pad structures of less than 50 microns (um), the proprietary technology platform also boosts performance, making it well suited for wireless and embedded processing applications based on plated copper pillar bumping and assembly technology, according to the companies.
“As chip I/O density increases with each process node, we had to find a way to decrease the distance between pins,” said Tom Thorpe, TI vice president and manager of external development and manufacturing (EDM), in a statement. “Working together, Amkor and TI rapidly developed, qualified and deployed a new package platform that will not only address TI’s flip chip package needs for the next decade but will also serve as a game changer for the industry. This new packaging technology will drive down the size and cost of semiconductors while boosting performance — a win for TI, Amkor and our customers.”
This new lead-free technology enables the use of flip-chip interconnection at fine pad pitches (50 um and smaller) using fine-pitch copper pillar bumping and a newly developed assembly process. The technology acts as the platform interconnect technology for integration with next-generation advanced silicon nodes, said the companies.
The fine-pitch flip-chip layout design methodology typically reduces substrate layer count as compared to standard area array flip chip, yielding a low-cost package solution, according to the companies. The package was developed for very thin die, which, when combined with the low standoff height of the copper pillar bump itself, reduces package height.